2/21/2013 Elise King, CSL Communications
Written by Elise King, CSL Communications
CSL Professor Rakesh Kumar recently received a 3-year, $75,000 per year grant from Oracle Labs to collaborate with the company to research energy efficiency in multi-threaded processors.
As the performance of a multi-threaded processor is increased, the amount of power that the processor uses also increases, however these processors now consume so much power that it is difficult to increase the performance by much. That is why CSL researchers are working on ways to reduce power.
A widely used approach to this problem of energy efficiency is to take a system that is already built for performance and look for ways to reduce power. However, instead of using this performance-first approach, CSL researchers will take a power-centric approach in which they will build the microarchitecture from the ground up around low power.
Xun Jian, one of Kumar’s graduate students who is working on this project, said that companies like Oracle can benefit from energy efficient processors because they power many data centers and servers and therefore have high energy costs. “You can also have a positive footprint on the environment by reducing these costs,” Jian said.
“I think Oracle is a good partner going forward with this research on energy efficient processors because of their strong emphasis on bringing down computing costs on the large scale.” said Kumar, an assistant professor of electrical and computer engineering.
“They want us to look at non-conventional, high impact solutions because those are the kind of solutions that academia can help them the most with,” Kumar said. For example, Kumar said that Oracle has been particularly interested in the work that Jian has been doing with energy efficient memory systems. Memory, which his often integrated into processor chips and also lies off-chip, consumes a lot of power, so Jian is looking at ways to re-design and re-organize memory in order to reduce overall power.
Jian looks at three main methods for reducing power: how application characteristics can be categorized to reduce the power cost of storage, the use of novel ways and coding schemes to store and retrieve information such that memory power is minimized, how emerging memory hierarchies such as embedded DRAM can reduce power.
“Stevo has already made significant progress in a short amount of time and I already see good, impactful ideas coming out of this research,” Kumar said about Jian, who often goes by the name Stevo.