The Circuits group explores topics ranging from complex systems-on-a-chip (SoC) design to nanoscale semiconductor devices, encompassing both IC design and computer-aided design tools. Research areas include ultra high-speed device modeling and technology; CMOS radiofrequency circuits; high-performance mixed-signal circuits and data converters; reliability issues in integrated circuits; algorithms; low-power SoC and FPGA design methodologies; and robust robust and energy-efficient integrated circuits and systems for DSP and communications.
Accurate Device Models
These models are critical for designing next-generation communication and computing systems in nanoscale processes technologies. The Circuits group developed both the UIUCICF CMOS Model, which predicts harmonic distortion in power amplifier and mixed signal circuits employed in wireless communication systems, and the UIUC-DDS CMOS model, which incorporates short-channel high field dipole diffusion noise source in BSIM model for accurate noise prediction in the microwave and millimeterwave frequencies.
Electrostatic Discharge Control
Researchers developed a four-pronged approach to combat electrostatic discharge (ESD), the most serious reliability hazard for modern integrated circuits. This includes the development of new ESD protection devices, circuit design, compact modeling and simulations, and test design. Recently, researchers developed the capability to do full-chip simulation of Charged Device Model (CDM) ESD events. These simulations enabled researchers to develop a new technique to protect internal gates from ESD without impacting performance.
Energy-efficient and high-performance SoCs enable emerging applications. Researchers have demonstrated a low-power 12-bit, 45-MS/s CMOS analog-to-digital converter, achieving a record energy-efficiency of 30-fJ/conversion-step by using digital equalization and perturbative adaptive learning rules.
Tracy Hunter: 418 CSL
Phone: (217) 333-0793