Illinois to lead $8.3 million initiative to design energy-efficient computing for autonomous platforms

7/26/2018 Kim Gudeman, Coordinated Science Lab

Written by Kim Gudeman, Coordinated Science Lab

The University of Illinois has received an $8.3 million grant to develop foundational computing technologies for next-generation autonomous systems for defense and commercial applications. The multi-university initiative includes collaborators from Princeton University, Raytheon Missile Systems (RMS), and GLOBALFOUNDRIES.

Naresh Shanbhag
Naresh Shanbhag
The team will develop novel computing technologies that addresses the needs of autonomous sensory platforms that make mission-critical decisions in real-time, within strict thermal limits and while withstanding high-radiation space environments. The program is being funded through the Defense Advanced Research Projects Agency (DARPA)’s Foundations Required for Novel Compute (FRANC) research program.

“These are sensor-rich platforms that acquire multi-modal data continuously,” said Naresh Shanbhag, Jack S. Kilby Professor of Electrical and Computer Engineering at Illinois and researcher in the Coordinated Science Lab. “Such large data volumes need to be processed in real-time using modern machine learning and artificial intelligence (AI) methods. Realizing such functionality in today’s silicon-based von Neumann architecture leads to high power dissipation making it hard to meet the thermal budget.”

The team’s approach is to use a silicon-compatible technology called the magnetoresistive random access memory (MRAM), provided by GLOBALFOUNDRIES. Compared to the commonly used static RAM (SRAM), MRAM is dense, non-volatile (meaning that it retains data even when the power source is turned off), and is immune to radiation effects.

However, MRAM accesses are slow and consumes much energy. Attempts to reduce energy or increase the speed can introduce random errors. To address these limitations, the researchers will employ UIUC and Princeton’s deep in-memory architecture (DIMA) within a statistical Shannon-inspired model of computing. DIMA alleviates MRAM’s energy and speed limitations by embedding analog computations in the memory array, thereby never having to read raw data, whereas the Shannon-inspired model of computing makes MRAM-based DIMA robust to computational errors that would arise when operating at the physical limits of energy and speed.

Pavan Kumar Hanumolu
Pavan Kumar Hanumolu
UIUC and Princeton have led previous efforts to design DIMA using SRAM and NAND flash devices. They have fabricated multiple integrated circuits demonstrating that DIMA achieves up to 200 times less energy-delay as compared to a von Neumann architecture in lab tests. Their SRAM-based DIMA work was recently featured via multiple publications in the flagship journal of the IEEE Solid-State Circuits Society, the IEEE Journal of Solid-State Circuits, and the widely read IEEE Spectrum magazine.

The MRAM-based DIMA designs will be fabricated by GLOBALFOUNDRIES and tested by RMS in their facilities. In addition to defense uses, Shanbhag believes these new technologies would have many commercial applications as well such as for autonomous vehicles and Internet of Things (IoT).

FRANC is one of the six programs under DARPA’s recently established Electronic Resurgence Initiative (ERI), whose goal is to “more constructively enmesh the technology needs and capabilities of the defense enterprise with the commercial and manufacturing realities of the electronics industry.” Of the six projects funded through FRANC, the Illinois project is the largest, according to IEEE Spectrum. In addition to Shanbhag, Illinois Professor Pavan Hanumolu is also part of the FRANC research team. Several additional Illinois faculty are contributing expertise to other ERI research, including Sarita Adve, Deming Chen, Wen-mei Hwu, and Martin Wong.

The seed for this research came out of the Systems On Nanoscale Information fabriC (SONIC) Center, a recently concluded five-year, $30 million initiative led by Shanbhag and funded through the Semiconductor Technology Advanced Research Network (STARnet), a partnership between DARPA and the Semiconductor Research Corporation.

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This story was published July 26, 2018.