Rosenbaum discusses how machine learning could impact chip manufacturing

ECE Melvin and Anne Louise Hassebrock Professor and CSL affiliate Elyse Rosenbaum is exploring how teachable tools can help speed up and refine chip manufacturing.

She explained to ElectronicDesign that most of the current machine learning tools simply ensure that the chips are matching specifications for manufacture without defects. Compare this to image recognition and cancer detection programs which engage in unsupervised machine learning. She said that most electronic design automation (EDA) applications will depend on humans for training. But machine learning tools could save significant time by smoothing edges of complex chips, optimizing numerous trade-offs, and testing them for manufacturing.

Rosenbaum is advancing the role of machine learning through research and leadership at the Center for Advancing Electronics with Machine Learning (CAEML), a center within the Coordinated Science Laboratory. The collaboration among industry partners and academic researchers was launched with support from the National Science Foundation and includes chip suppliers like Samsung and Qualcomm, software firms Cadence and Synopsys, and server companies like Hewlett Packard Enterprise.

CAEML projects include the use of machine learning to optimize power delivery networks, the reuse of intellectual property, and behavioral model development for high-speed links. Additional projects involve speeding up verification through modular algorithms, and ensuring chip layouts match specifications with the use of deep learning software. 

While tools may not be able to independently make chips from scratch in the near future, it is much more likely that advanced tools will be used as quick editors for optimizing interconnects and circuits.

For more information read the ElectronicDesign article.